The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Jan. 07, 2022
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventor:

Rumin Ji, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4091 (2006.01); G11C 11/4074 (2006.01); G11C 11/4094 (2006.01); G11C 11/4099 (2006.01); G11C 17/14 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 11/4074 (2013.01); G11C 11/4094 (2013.01); G11C 11/4099 (2013.01); G11C 17/143 (2013.01);
Abstract

A state detection circuit for an anti-fuse memory cell includes: amplifier, having first input terminal connected with first reference voltage, second input terminal connected with first node and output terminal connected with second node; anti-fuse memory cell array, including anti-fuse memory cell sub-arrays, bit lines of sub-arrays are connected with first node, word lines of sub-arrays are connected with controller and each sub-array includes anti-fuse memory cells; first switch element, having first terminal connected with power supply, second terminal connected with first node and control terminal connected with second node; second switch element, having first terminal connected with power supply, second terminal connected with third node and control terminal connected with second node; third switch element, having first terminal connected with third node, grounded second terminal and control terminal connected with controller; and comparator, having first and second input terminals connected with third node and second reference voltage respectively.


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