The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2023
Filed:
Jul. 25, 2022
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Vy Vo, Portland, OR (US);
Dipanjan Sengupta, Hillsboro, OR (US);
Mariano Tepper, Portland, OR (US);
Javier Sebastian Turek, Beaverton, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/32 (2018.01); G06F 9/50 (2006.01); G06F 12/0815 (2016.01); G06N 3/063 (2023.01); G06F 11/34 (2006.01); G06F 18/21 (2023.01); G06N 3/045 (2023.01);
U.S. Cl.
CPC ...
G06F 9/3877 (2013.01); G06F 9/321 (2013.01); G06F 9/5016 (2013.01); G06F 9/5066 (2013.01); G06F 11/3457 (2013.01); G06F 12/0815 (2013.01); G06F 18/217 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2013.01); G06F 2212/1021 (2013.01);
Abstract
An example system includes memory; a central processing unit (CPU) to execute first operations; in-memory execution circuitry in the memory; and detector software to cause offloading of second operations to the in-memory execution circuitry, the in-memory execution circuitry to execute the second operations in parallel with the CPU executing the first operations.