The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2023

Filed:

Jul. 11, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Kishore K. Muchherla, Fremont, CA (US);

Vamsi Pavan Rayaprolu, San Jose, CA (US);

Karl D. Schuh, Santa Cruz, CA (US);

Jiangang Wu, Milpitas, CA (US);

Gil Golov, Backnang, DE;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/0882 (2016.01); G06F 12/0873 (2016.01); G06F 11/30 (2006.01); G06F 12/0811 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 11/3037 (2013.01); G06F 12/0811 (2013.01); G06F 12/0873 (2013.01); G06F 12/0882 (2013.01); G06F 2212/7201 (2013.01);
Abstract

A system includes a memory device and a processing device coupled to the memory device. The processing device can determine a data rate from a first sensor and a data rate from a second sensor. The processing device can write a first set of data received from the first sensor at a first logical block address (LBA) in the memory device. The processing device can write a second set of data received from the second sensor and subsequent to the first set of data at a second LBA in the memory device. The processing device can remap the first LBA and the second LBA to be logically sequential LBAs. The second LBA can be associated with an offset from the first LBA and the offset can correspond to a data rate of the first sensor.


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