The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

Jan. 10, 2022
Applicant:

Changxin Memory Technologies, Inc., Anhui, CN;

Inventor:

Rumin Ji, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/16 (2006.01); G11C 11/4096 (2006.01); G11C 11/408 (2006.01); G11C 5/06 (2006.01); G11C 11/4074 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4096 (2013.01); G11C 5/063 (2013.01); G11C 11/4074 (2013.01); G11C 11/4085 (2013.01); G11C 11/4094 (2013.01); G11C 17/16 (2013.01);
Abstract

Provided is an anti-fuse memory circuit. The anti-fuse memory circuit includes a memory array, a bit line (BL), and a word line (WL); an anti-fuse memory cell (FsBIn) electrically connected to the bit line (BL) through a first switch transistor (Add); a second switch transistor (Add) configured to connect the bit line (BL) to a transmission wire (); a third switch transistor (Add) configured to discharge the transmission wire (); a reading module () including a first input end (+) connected to the transmission wire (), a second input end (−) for receiving a reference voltage (VTRIP), and a sampling input end (C) for receiving a sampling signal (CLK); and a compensation module (), connected to the third switch transistor (Add) and configured to slow down a drop speed of a voltage at the transmission wire ().


Find Patent Forward Citations

Loading…