The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2023
Filed:
Sep. 15, 2022
Applicant:
Rambus Inc., San Jose, CA (US);
Inventors:
Jade M. Kizer, Fort Collins, CO (US);
Sivakumar Doraiswamy, San Jose, CA (US);
Benedict Lau, San Jose, CA (US);
Assignee:
Rambus Inc., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 11/4076 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G11C 8/18 (2006.01); G11C 7/22 (2006.01); G11C 11/4063 (2006.01); G11C 11/4072 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 13/1689 (2013.01); G06F 13/405 (2013.01); G11C 7/222 (2013.01); G11C 8/18 (2013.01); G11C 11/4063 (2013.01); G11C 11/4072 (2013.01); G11C 11/4096 (2013.01);
Abstract
An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.