The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2023

Filed:

May. 07, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Prateek Sharma, San Jose, CA (US);

Bridget L. Mallak, Forest Lake, MN (US);

Kevin R. Duncan, Ramsey, MN (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 9/48 (2006.01); G06F 9/445 (2018.01); G06F 13/16 (2006.01); G06F 11/30 (2006.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/45558 (2013.01); G06F 9/3836 (2013.01); G06F 9/44505 (2013.01); G06F 9/4818 (2013.01); G06F 11/3037 (2013.01); G06F 13/1605 (2013.01); G06F 2009/45583 (2013.01);
Abstract

A processing device of a memory sub-system can receive a plurality of commands from a plurality of virtual machines via a host interface and associate each of the plurality of commands with a respective function that represents a respective virtual machine from which each of the plurality of commands was received. The controller of the memory sub-system can also setup a respective definition of a respective quality of service for each respective function regarding consumption of resources of the memory device, wherein the controller comprises arbitration circuitry to handle each of the plurality of commands on a per function basis according to the definition.


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