The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2023

Filed:

Sep. 09, 2020
Applicant:

Amkor Technology Singapore Holding Pte. Ltd, Valley Point, SG;

Inventors:

Tae Ki Kim, Incheon, KR;

Jae Beom Shim, Incheon, KR;

Min Jae Yi, Gyeonggi-do, KR;

Yi Seul Han, Incheon, KR;

Young Ju Lee, Incheon, KR;

Kyeong Tae Kim, Incheon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/16 (2006.01); H01L 23/538 (2006.01); H01L 23/552 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 23/16 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 23/552 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/3512 (2013.01);
Abstract

In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the first opening having a pad base top side recessed below an upper surface the first dielectric and a pad head coupled to the pad base within the first opening, the pad head having a pad head top side with a micro dimple. Other examples and related methods are also disclosed herein.


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