The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 2023
Filed:
Oct. 30, 2020
Applicants:
Advanced Micro Devices, Inc., Santa Clara, CA (US);
Ati Technologies Ulc, Markham, CA;
Inventors:
Rahul Agarwal, Santa Clara, CA (US);
Raja Swaminathan, Austin, TX (US);
Michael S. Alfano, Austin, TX (US);
Gabriel H. Loh, Bellevue, WA (US);
Alan D. Smith, Austin, TX (US);
Gabriel Wong, Markham, CA;
Michael Mantor, Orlando, FL (US);
Assignees:
ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);
ATI TECHNOLOGIES ULC, Markham, CA;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 25/065 (2023.01); H01L 21/50 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5384 (2013.01); H01L 21/50 (2013.01); H01L 23/5381 (2013.01); H01L 23/5385 (2013.01); H01L 25/0657 (2013.01); H01L 27/0688 (2013.01);
Abstract
A semiconductor package includes a first die, a second die, and an interconnect die coupled to a first plurality of through-die vias in the first die and a second plurality of through-die vias in the second die. The interconnect die provides communications pathways the first die and the second die.