The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2023

Filed:

Oct. 28, 2020
Applicant:

Xiamen Sanan Integrated Circuit Co., Ltd., Xiamen, CN;

Inventors:

Tsung-Te Chiu, Xiamen, CN;

Kechuang Lin, Xiamen, CN;

Houng-Chi Wei, Xiamen, CN;

Chia-Chu Kuo, Xiamen, CN;

Bing-Han Chuang, Xiamen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); C23C 14/16 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02016 (2013.01); C23C 14/16 (2013.01); H01L 21/0254 (2013.01); H01L 21/02581 (2013.01); H01L 21/02554 (2013.01);
Abstract

A backside metallized compound semiconductor device includes a compound semiconductor wafer and a metal layered structure. The compound semiconductor wafer includes a substrate having opposite front and back surfaces, and a ground pad structure formed on the front surface. The substrate is formed with a via extending from the back surface to the front surface to expose a side wall of the substrate and a portion of the ground pad structure. The metal layered structure is disposed on the back surface, and covers the side wall and the portion of the ground pad structure. The metal layered structure includes an adhesion layer, a seed layer, a gold layer, and an electroplated copper layer that are formed on the back surface in such order. The method for manufacturing the backside metallized compound semiconductor device is also disclosed.


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