The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2023

Filed:

Aug. 21, 2020
Applicant:

Rambus Inc., San Jose, CA (US);

Inventors:

Craig Hampel, Los Altos, CA (US);

Mark Horowitz, Menlo Park, CA (US);

Assignee:

Rambus Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/12 (2006.01); G06F 12/08 (2016.01); G06F 12/0804 (2016.01); G06F 13/16 (2006.01); G11C 5/04 (2006.01); G11C 7/10 (2006.01); G11C 29/00 (2006.01); G06F 3/06 (2006.01); G06F 12/0897 (2016.01); G11C 29/32 (2006.01);
U.S. Cl.
CPC ...
G11C 29/1201 (2013.01); G06F 3/0611 (2013.01); G06F 3/0614 (2013.01); G06F 3/0647 (2013.01); G06F 3/0688 (2013.01); G06F 12/08 (2013.01); G06F 12/0804 (2013.01); G06F 12/0897 (2013.01); G06F 13/1684 (2013.01); G11C 5/04 (2013.01); G11C 7/10 (2013.01); G11C 7/1003 (2013.01); G11C 29/12 (2013.01); G11C 29/12015 (2013.01); G11C 29/32 (2013.01); G11C 29/76 (2013.01); G06F 2212/205 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/3042 (2013.01); G06F 2212/608 (2013.01); G11C 2029/3202 (2013.01); Y02D 10/00 (2018.01);
Abstract

Volatile memory devices may be on a first memory module that is coupled to a memory controller by a first signal path. A nonvolatile memory device may be on a second memory module that is coupled to the first memory module by a second signal path. A memory transaction for the nonvolatile memory device may be transferred from the memory controller to at least one of the volatile memory devices using the first signal path and data associated with the memory transaction is to be written from at least one of the volatile memory devices to the nonvolatile memory device using the second signal path and a control signal. A durability circuit may generate the control signal based on a comparison of a number of write transactions to a particular memory location with a threshold value.


Find Patent Forward Citations

Loading…