The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2023

Filed:

Jun. 20, 2022
Applicants:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Tsmc Nanjing Company, Limited, Nanjing, CN;

Inventors:

Huaixin Xian, Hsinchu, TW;

Changlin Huang, Hsinchu, TW;

Qingchao Meng, Hsinchu, TW;

Jerry Chang Jui Kao, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/50 (2006.01); G01R 31/3185 (2006.01); H03K 3/353 (2006.01); G06F 30/392 (2020.01);
U.S. Cl.
CPC ...
G01R 31/318541 (2013.01); G01R 31/31858 (2013.01); G01R 31/318525 (2013.01); G01R 31/318555 (2013.01); G06F 30/392 (2020.01); H03K 3/353 (2013.01);
Abstract

A semiconductor device has a cell region including active regions that extend in a first direction and in which are formed components of transistors. The transistors of the cell region are arranged to function as a scan insertion D flip flop (SDFQ). The SDFQ includes a multiplexer serially connected at an internal node to a D flip-flop (FF). The transistors of the multiplexer include data transistors for selecting a data input signal, the data transistors having a first channel configuration with a first channel size, and scan transistors of the multiplexer for selecting a scan input signal, the scan transistors having a second channel configuration with a second channel size. The second channel size is smaller than the first channel size.


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