The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Oct. 04, 2021
Applicant:

Shanghai Huali Microelectronics Corporation, Shanghai, CN;

Inventors:

Liyuan Liu, Shanghai, CN;

Li He, Shanghai, CN;

Fulong Qiao, Shanghai, CN;

Yi Wang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H01L 21/308 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76224 (2013.01); H01L 21/3086 (2013.01); H01L 21/3088 (2013.01); H01L 21/32139 (2013.01);
Abstract

The disclosure provides a method for manufacturing shallow trench isolations, providing a substrate comprising a storage cell area and a peripheral area of a storage device; etching the upper part of the substrate of the storage cell area using a first etching process to form a first shallow trench, and filling the first shallow trench with silicon oxide using a first deposition process; and etching the upper part of the substrate of the peripheral area using a second etching process to form a second shallow trench, and filling the second shallow trench with silicon oxide using a second deposition process; wherein the depth and characteristic dimension of the first shallow trench are smaller than the depth and characteristic dimension of the second shallow trench. The disclosure can avoid the silicon dislocation defect of the peripheral area and ensure the device shape and characteristic dimension of the storage cell area.


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