The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2023

Filed:

Feb. 05, 2020
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Madhu Santosh Kumar Mutyala, Santa Clara, CA (US);

Sanjay Kamath, Fremont, CA (US);

Deenesh Padhi, Sunnyvale, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01J 37/32 (2006.01); C23C 16/40 (2006.01); C23C 16/50 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02274 (2013.01); C23C 16/401 (2013.01); C23C 16/50 (2013.01); H01J 37/32834 (2013.01); H01L 21/02164 (2013.01); H01L 21/02216 (2013.01); H01J 2237/3321 (2013.01);
Abstract

Exemplary deposition methods may include forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include depositing material on the semiconductor substrate to a target thickness. The methods may include halting delivery of the silicon-containing precursor while maintaining the plasma with the one or more precursors. The methods may include purging the processing region of the semiconductor processing chamber.


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