The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2023

Filed:

Jun. 07, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Daniel A. Boals, Broomfield, CO (US);

Byron D. Harris, Mead, CO (US);

Karl D. Schuh, Santa Cruz, CA (US);

Amy L. Wohlschlegel, Lafayette, CO (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 11/1471 (2013.01); G06F 2201/84 (2013.01); G06F 2212/7201 (2013.01);
Abstract

A zone is loaded onto a first memory component of a storage system, wherein the zone comprises one or more regions of data blocks comprising a first plurality of logical block addresses (LBAs), and a snapshot of each of the one or more regions is stored on a second memory component of the storage system and is associated with a version identifier. A particular version identifier associated with a respective snapshot of a region is identified, and a set of journals stored on the second memory component are identified, wherein the set of journals comprise a second plurality of LBAs mapped to a second plurality of physical block addresses. The one or more regions of the zone are reconstructed, wherein the reconstructing comprises reading the second plurality of LBAs of the set of journals to identify a first logical block address (LBA) that matches with a second LBA within the first plurality of LBAs on the loaded zone on the first memory component, and updating a physical block address corresponding to the second LBA on the loaded zone with a physical block address corresponding to the first LBA from the set of journals.


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