The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2023

Filed:

Mar. 15, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Hideki Yamada, Yokohama, JP;

Masanobu Shirakawa, Chigasaki, JP;

Naomi Takeda, Yokohama, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/0631 (2013.01); G06F 3/0679 (2013.01); G06F 12/0238 (2013.01); G06F 2212/7201 (2013.01);
Abstract

A memory controller according to an embodiment includes a control circuit configured to duplicate and store data received from an external host device. The control circuit is configured to, when a write request specifying first data and a first logical address is received: i) allocate a first physical address corresponding to a first bit to the first logical address, and order a first memory device to write the first data to the first physical address; and ii) allocate a first mirroring physical address corresponding to a second bit to the first physical address, and order a second memory device to write the first data to the first mirroring physical address. A number of reads the first bit is different from a number of reads for the second bit.


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