The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2023
Filed:
Nov. 22, 2021
Cadence Design Systems, Inc., San Jose, CA (US);
Hongzhou Liu, Sewickley, PA (US);
Rahaprian Premavathi Mudiarasan, Pittsburgh, PA (US);
Sandipan Ghosh, San Jose, CA (US);
Hui Xu, Wexford, PA (US);
Chris (Shyh-Chang) Lin, Hsinchu, TW;
Joshua Baudhuin, Portland, OR (US);
Ron Pyke, Bellevue, WA (US);
Juno Lin, Saratoga, CA (US);
Allen You, Taipei, TW;
Yu Liu, Shanghai, CN;
Jiulong Zhang, New York, NY (US);
Thomas Richards, Pittsburgh, PA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include receiving, using a processor, an electronic design library including a plurality of design rules. Embodiments may include generating a routing graph, based upon, at least in part, the plurality of design rules, wherein the routing graph is a virtual representation of all of the available routing space for all routing layers associated with an electronic design. Embodiments may further include dynamically updating the routing graph at a graphical user interface, based upon, at least in part, a creation of a routing segment or a via at the graphical user interface.