The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

May. 25, 2021
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Sung Kun Park, Icheon-si, KR;

Jae Young Song, Icheon-si, KR;

Assignee:

SK HYNIX INC., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01); H10B 41/10 (2023.01); H10B 41/35 (2023.01); H10B 41/41 (2023.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42328 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); H10B 41/10 (2023.02); H10B 41/35 (2023.02); H10B 41/41 (2023.02); G11C 16/3427 (2013.01);
Abstract

Memory devices are disclosed. In an embodiment of the disclosed technology, a memory device may include a substrate including an active region, and a first floating gate, a second floating gate, a third floating gate and a fourth floating gate formed on the substrate, arranged to partially overlap with the active region. The first floating gate and the third floating gate are arranged in a first direction at one side of the active region and asymmetrical about a center of the active region, and the second floating gate and the fourth floating gate are arranged in the first direction at another side of the active region and asymmetrical about the center of the active region.


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