The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

Apr. 12, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ravi Babu Pittu, Hsinchu, TW;

Chung-Hsing Wang, Hsinchu, TW;

Sung-Yen Yeh, Pingtung, TW;

Li Chung Hsu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2018.01); G06F 30/3312 (2020.01); G06F 30/39 (2020.01); G06F 30/367 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 30/367 (2020.01); G06F 30/39 (2020.01); G06F 2119/12 (2020.01);
Abstract

A method and system for manufacturing a circuit is disclosed. In some embodiments, the system includes: at least one processor configured to: generate a first timing library for a first set of circuit elements for a first set of input parameters based on device characteristics for each of the circuit elements in the first set of circuit elements, and storing the determined device characteristics in a database; and generating a second timing library for a second set of circuit elements for a second set of input parameters based on device characteristics previously stored in the database for a first subset of the second set of circuit elements and determining device characteristics for a second subset of the second set of circuit elements using one of an aging simulation or a stress simulation; and a circuit generation system, coupled to the at least one processor, the circuit generation system configured to form a circuit on a substrate, wherein the circuit includes at least one of the first set of circuit elements or the second set of circuit elements.


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