The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2023

Filed:

Nov. 18, 2021
Applicant:

Rambus Inc., San Jose, CA (US);

Inventors:

Panduka Wijetunga, Thousand Oaks, CA (US);

Marcial Chua, Thousand Oaks, CA (US);

Srinivas Satish Babu Bamdhamravuri, Newbury Park, CA (US);

Abhishek Desai, Newbury Park, CA (US);

Philip Lu, Camarillo, CA (US);

Cosmin Iorga, Westlake Village, CA (US);

Assignee:

Rambus Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01);
Abstract

A memory controller conveys a clock signal with command and address signals to a registered clock driver (RCD) on a memory module. A controller-side chip interface on the RCD supports both source-synchronous and filtered clocking for receipt of the command and address signals, the selection between the two clocking schemes dependent upon the noise environment impacting the clock and command/address signals. If the noise is predominantly correlated, then the chip interface is placed in a source-synchronous clocking mode. If the noise is predominantly uncorrelated, then the chip interface is placed in a filtered clocking mode that filters out uncorrelated noise from the clock signal.


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