The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2023
Filed:
Feb. 09, 2021
Kabushiki Kaisha Toshiba, Tokyo, JP;
Toshiba Electronic Devices & Storage Corporation, Tokyo, JP;
Yusuke Kobayashi, Nagareyama, JP;
Tatsunori Sakano, Shinagawa, JP;
Hiro Gangi, Ota, JP;
Tomoaki Inokuchi, Yokohama, JP;
Takahiro Kato, Yokohama, JP;
Yusuke Hayashi, Yokohama, JP;
Ryohei Gejo, Kawasaki, JP;
Tatsuya Nishiwaki, Komatsu, JP;
KABUSHIKA KAISHA TOSHIBA, Tokyo, JP;
TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo, JP;
Abstract
According to one embodiment, a semiconductor device includes a semiconductor member, first and second electrodes, a gate electrode, a gate terminal, a first conductive member, a first terminal, and a first insulating member. The semiconductor member includes first and second semiconductor regions, and a third semiconductor region provided between the first and second semiconductor regions. The first electrode is electrically connected to the first semiconductor region. The second electrode is electrically connected to the second semiconductor region. The gate terminal is electrically connected to the gate electrode. The first conductive member is electrically insulated from the first and second electrodes, and the gate electrode. The first terminal is electrically connected to the first conductive member. The first insulating member includes a first insulating region between the third semiconductor region and the gate electrode, and a second insulating region between the gate electrode and the first conductive member.