The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

May. 05, 2022
Applicant:

Globalfoundries U.s. Inc., Malta, NY (US);

Inventors:

Sagar Premnath Karalkar, Essex Junction, VT (US);

Jie Zeng, Singapore, SG;

Milova Paul, Singapore, SG;

Souvick Mitra, Essex Junction, VT (US);

Assignee:

GlobalFoundries U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/74 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0262 (2013.01); H01L 29/66363 (2013.01); H01L 29/74 (2013.01);
Abstract

Structures for a silicon-controlled rectifier and methods of forming a structure for a silicon-controlled rectifier. The structure includes first and second wells in the semiconductor substrate, a first terminal including a first doped region in the first well, and a second terminal including a second doped region in the second well. The first well and the second doped region have a first conductivity type, and the second well and the first doped region have a second conductivity type opposite to the first conductivity type. First and second conductor layers are positioned on the semiconductor substrate. The first conductor layer partially overlaps with the first well, and the second conductor layer partially overlaps with the second well. A third doped region, which has the second conductivity type, is laterally positioned in the semiconductor substrate between the first and second conductor layers.


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