The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2023

Filed:

Sep. 14, 2021
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Reika Tanaka, Yokohama, JP;

Masumi Saitoh, Yokkaichi, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 16/14 (2006.01); G11C 16/10 (2006.01); G11C 5/06 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); G11C 5/06 (2013.01); G11C 16/102 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01);
Abstract

A semiconductor memory device includes a semiconductor layer, a gate electrode, a gate insulating film disposed therebetween, first and second wirings connected to the semiconductor layer, and a third wiring connected to the gate electrode and is configured to execute a write operation, an erase operation, and a read operation. In the write operation, a write voltage of a first polarity is supplied between the third wiring and at least one of the first wiring or the second wiring. In the erase operation, an erase voltage of a second polarity is supplied between the third wiring and at least one of the first wiring or the second wiring. In the read operation, the write voltage or a voltage having a larger amplitude than that of the write voltage is supplied between the third wiring and at least one of the first wiring or the second wiring.


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