The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2023

Filed:

Jun. 17, 2021
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Percy Edgard Neyra, Chandler, AZ (US);

John Ryan Goodfellow, Mesa, AZ (US);

Ondrej Pauk, Chandler, AZ (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/156 (2006.01); H02M 1/32 (2007.01); H03K 7/08 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 3/156 (2013.01); H02M 1/32 (2013.01); H02M 1/0012 (2021.05); H02M 1/0025 (2021.05); H02M 1/325 (2021.05); H02M 3/1566 (2021.05); H03K 7/08 (2013.01);
Abstract

A method for dynamic enhancement of loop response upon recovery from fault conditions includes detecting a fault condition in response to a programmed output voltage of a Pulse Width Modulation (PWM) converter decreasing below an input voltage of the PWM converter. A peak voltage is sampled at the end of at least one of a plurality of clock cycles of the PWM converter in response to detecting the fault condition, wherein the peak voltage is proportional to a sensed current conducted through a transistor. An error output of an error amplifier is preset to an error value determined by the peak voltage. A PWM driver is controlled with the error value to drive the transistor. An output load is charged to the programmed output voltage with the transistor in response to the input voltage increasing above the programmed output voltage.


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