The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2023

Filed:

Sep. 25, 2020
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

WoonJae Beak, Incheon, KR;

MinSu Kim, Incheon, KR;

HeeSoo Lee, Kyunggi-do, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/532 (2006.01); H01L 23/31 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53238 (2013.01); H01L 21/76838 (2013.01); H01L 23/31 (2013.01);
Abstract

A semiconductor device has a substrate and a first conductive layer formed over the substrate. A second conductive layer is formed over the first conductive layer. The first conductive layer can be copper, and the second conductive layer can be nickel. A thickness of the second conductive layer is greater than a thickness of the first conductive layer. A flux material is deposited over the second conductive layer by a printing process. An electrical component is disposed over the flux material, and the flux material is reflowed to make electrical connection between the electrical component and second conductive layer. The flux material substantially vaporizes during the reflow to reduce the occurrence of short circuits. The electrical components can be placed over the substrate with narrow spacing and higher density given the use of the flux material to make electrical connection. An encapsulant is deposited over the electrical component.


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