The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 19, 2023

Filed:

Apr. 20, 2021
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Mayukh Bhattacharya, Mountain View, CA (US);

Michael Durr, Mountain View, CA (US);

Mira Tzakova, Mountain View, CA (US);

Beatrice Solignac, Mountain View, CA (US);

Rayson Yam, Mountain View, CA (US);

Assignee:

Synopsys, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/367 (2020.01); G06F 119/02 (2020.01);
U.S. Cl.
CPC ...
G06F 30/367 (2020.01); G06F 2119/02 (2020.01);
Abstract

A method of simulating defects in an analog circuit design includes, in part, defining a multitude of defect models, defining a defect scope associated with the defect models, and compiling, by a processor, the defect models, the defect scope, and a netlist associated with the analog circuit design. The method further includes, in part, scanning the netlist to identify a multitude of nodes to which a multitude of defects defined by the defect models and the defect scope are applied, injecting the multitude of defects at the identified nodes, and simulating the analog circuit design using the injected defects.


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