The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2023
Filed:
Aug. 06, 2021
Micron Technology, Inc., Boise, ID (US);
Woei Chen Peh, Singapore, SG;
Eng Hong Tan, Pulau Pinang, MY;
Andrew M. Kowles, Boise, ID (US);
Xiaoxin Zou, Singapore, SG;
Zaihas Amri Fahdzan Bin Hasfar, Singapore, SG;
Micron Technology, Inc., Boise, ID (US);
Abstract
Devices, methods, and media are described for runtime memory allocation to avoid defects. One embodiment includes assigning a plurality of memory blocks of a memory sub-system to a plurality of erase groups, such that each erase group of the plurality of erase groups comprises two or more memory blocks of the plurality of memory blocks. A bad block association is determined for each erase group of the plurality of erase groups. Prior to a memory condition being met, memory resources of the memory sub-system are allocated by erase group based on a first set of criteria which are based at least in part on the bad block association for each erase group in order to prioritize use of erase groups with fewer bad blocks. After the memory condition has been met, the memory resources of the memory sub-system are then allocated by erase group according to a second set of criteria, wherein the second set of criteria allocates the memory resources irrespective of bad block association for each erase group after the determining that the memory condition has been met.