The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Apr. 14, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Wei Cheng Wu, Zhubei, TW;

Pai Chi Chou, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/762 (2006.01); H10B 51/30 (2023.01); H01L 29/78 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H10B 51/30 (2023.02); H01L 21/76224 (2013.01); H01L 29/0657 (2013.01); H01L 29/42364 (2013.01); H01L 29/516 (2013.01); H01L 29/6684 (2013.01); H01L 29/78391 (2014.09);
Abstract

In some embodiments, the present disclosure relates to an integrated circuit. The integrated circuit has a first doped region and a second doped region within a substrate. A ferroelectric material is arranged over the substrate and laterally between the first doped region and the second doped region. A conductive electrode is over the ferroelectric material and between sidewalls of the ferroelectric material. One or more sidewall spacers are arranged along opposing sides of the ferroelectric material. A dielectric layer continuously and laterally extends from directly below the one or more sidewall spacers to directly below the ferroelectric material.


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