The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Mar. 12, 2020
Applicant:

Hitachi Energy Switzerland Ag, Baden, CH;

Inventors:

Niko Pavlicek, Zürich, CH;

Fabian Mohn, Ennetbaden, CH;

Markus Thut, Nidau, CH;

Swen Koenig, Küssaberg, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 25/07 (2006.01);
U.S. Cl.
CPC ...
H01L 24/40 (2013.01); H01L 23/4985 (2013.01); H01L 24/37 (2013.01); H01L 24/73 (2013.01); H01L 24/84 (2013.01); H01L 25/072 (2013.01); H01L 2224/37147 (2013.01); H01L 2224/4001 (2013.01); H01L 2224/4005 (2013.01); H01L 2224/40137 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/73221 (2013.01); H01L 2224/84214 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/3512 (2013.01); H01L 2924/386 (2013.01);
Abstract

A power semiconductor module includes a substrate with a structured metallization layer and a number of semiconductor chips. Each chip has a first power electrode bonded to the metallization layer. A leadframe is laser-welded to second power electrodes of the semiconductor chips for electrically interconnecting the semiconductor chips. A control conductor is attached to the leadframe opposite to the semiconductor chips and is electrically isolated from the leadframe. The control conductor is electrically connected to control electrodes of the semiconductor chips in the group.


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