The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Aug. 27, 2021
Applicant:

I-shou University, Kaohsiung, TW;

Inventors:

Yu-Jung Huang, Kaohsiung, TW;

Mong-Na Lo Huang, Kaohsiung, TW;

Tzu-Lun Yuan, Taichung, TW;

Mei-Hui Guo, Kaohsiung, TW;

Assignee:

I-SHOU UNIVERSITY, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/00 (2020.01); G06F 30/392 (2020.01); H04B 17/391 (2015.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); H04B 17/391 (2015.01); H01L 25/0657 (2013.01); H01L 2225/06531 (2013.01);
Abstract

A method and an electronic device for configuring signal pads between three-dimensional stacked chips are provided. The method includes: obtaining a plurality of frequency response curves corresponding to a plurality of parameter sets; obtaining an operating frequency; selecting a selected frequency response curve from the plurality of frequency response curves according to the operating frequency, where the selected frequency response curve corresponds to a selected parameter set among the plurality of parameter sets; generating, according to the selected parameter set, a signal pad configuration for configuring a first signal pad and a second signal pad on a surface of a chip; and outputting the signal pad configuration.


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