The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2023

Filed:

Aug. 25, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Yoshinori Fujiwara, Boise, ID (US);

Daniel S. Miller, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/36 (2006.01); G11C 29/12 (2006.01); G11C 29/44 (2006.01); G11C 29/46 (2006.01);
U.S. Cl.
CPC ...
G11C 29/36 (2013.01); G11C 29/12015 (2013.01); G11C 29/4401 (2013.01); G11C 29/46 (2013.01); G11C 2029/3602 (2013.01);
Abstract

An apparatus with a memory array having a plurality of memory cells. The apparatus also including a memory built-in self-test circuit to test the memory array. The memory built-in self-test circuit includes one or more processing devices to write a data pattern to one or more memory cells to be tested in the memory array, pause for a time period corresponding to a predetermined pause time setting, and read the written data pattern from the one or more memory cells after the time period has elapsed. The predetermined pause time setting is automatically adjusted based on memory device conditions, which can include the temperature of the apparatus.


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