The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2023

Filed:

Mar. 27, 2020
Applicants:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Stmicroelectronics International N.v., Geneva, CH;

Inventors:

Giuseppe Desoli, San Fermo Della Battaglia, IT;

Thomas Boesch, Rovio, CH;

Carmine Cappetta, Battipaglia, IT;

Ugo Maria Iannuzzi, Milan, IT;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06N 3/04 (2023.01);
U.S. Cl.
CPC ...
G06F 7/5443 (2013.01); G06N 3/04 (2013.01);
Abstract

A Multiple Accumulate (MAC) hardware accelerator includes a plurality of multipliers. The plurality of multipliers multiply a digit-serial input having a plurality of digits by a parallel input having a plurality of bits by sequentially multiplying individual digits of the digit-serial input by the plurality of bits of the parallel input. A result is generated based on the multiplication of the digit-serial input by the parallel input. An accelerator framework may include multiple MAC hardware accelerators, and may be used to implement a convolutional neural network. The MAC hardware accelerators may multiple an input weight by an input feature by sequentially multiplying individual digits of the input weight by the input feature.


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