The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2023
Filed:
Jul. 09, 2021
Applicant:
Cadence Design Systems, Inc., San Jose, CA (US);
Inventors:
Rania Hassan Abdellatif Abdelrahim Mekky, Montreal, CA;
Jean-Francois Delage, Montréal, CA;
Guillaume Fortin, Montréal, CA;
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1/00 (2006.01); H03K 19/017 (2006.01); H03K 19/0185 (2006.01); H03K 19/21 (2006.01); H04L 7/00 (2006.01); H04L 27/38 (2006.01); H04L 1/1607 (2023.01); H04L 7/033 (2006.01); H04L 27/00 (2006.01);
U.S. Cl.
CPC ...
H04L 1/0045 (2013.01); H03K 19/01742 (2013.01); H03K 19/018521 (2013.01); H03K 19/21 (2013.01); H04L 1/0033 (2013.01); H04L 1/1678 (2013.01); H04L 7/0087 (2013.01); H04L 7/0331 (2013.01); H04L 27/3854 (2013.01); H04L 2027/0065 (2013.01);
Abstract
A method and system for performing a duty cycle correction and quadrature error correction for a quarter-rate architecture TX/RX communication system, including correcting a duty cycle error between a first clock signal and a second clock signal, and correcting a quadrature error between a third clock signal and a fourth clock signal.