The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2023
Filed:
Nov. 08, 2018
Applicant:
Winbond Electronics Corp., Taichung, TW;
Inventor:
Yasuhiro Tomita, Kanagawa, JP;
Assignee:
Winbond Electronics Corp., Taichung, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/04 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/003 (2013.01); G11C 13/004 (2013.01); G11C 13/0023 (2013.01); G11C 13/0033 (2013.01); G11C 13/0035 (2013.01); G11C 2013/0083 (2013.01); G11C 2013/0092 (2013.01); G11C 2211/5641 (2013.01); G11C 2211/5646 (2013.01); G11C 2213/79 (2013.01); G11C 2213/82 (2013.01);
Abstract
A semiconductor memory device capable of satisfying multiple reliability conditions and multiple performance requirements is provided. A variable resistance memory of the disclosure makes it possible to write data in a memory array by changing a write condition according to the type of a write command from the outside. If the write command is an endurance-related command, an endurance algorithm is selected and data is written in an endurance storage area. If the write command is a retention-related command, a retention algorithm is selected and data is written in a retention storage area.