The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

May. 27, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ishwar Agarwal, Portland, OR (US);

Rupin H. Vakharwala, Hillsboro, OR (US);

Rajesh M. Sankaran, Portland, OR (US);

Stephen R. Van Doren, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 12/0862 (2016.01); G06F 12/1009 (2016.01); G06F 12/1045 (2016.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/161 (2013.01); G06F 12/0862 (2013.01); G06F 12/1009 (2013.01); G06F 12/1063 (2013.01); G06F 13/1663 (2013.01); G06F 13/4282 (2013.01); G06F 2212/602 (2013.01); G06F 2212/621 (2013.01); G06F 2212/65 (2013.01); G06F 2212/68 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Aspects of the embodiments are directed to systems and methods for providing and using hints in data packets to perform memory transaction optimization processes prior to receiving one or more data packets that rely on memory transactions. The systems and methods can include receiving, from a device connected to the root complex across a PCIe-compliant link, a data packet; identifying from the received device a memory transaction hint bit; determining a memory transaction from the memory transaction hint bit; and performing an optimization process based, at least in part, on the determined memory transaction.


Find Patent Forward Citations

Agarwal, Ishwar. (2023). Method, apparatus, system for early page granular hints from a pcie device (U.S. Patent No. 11726927). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11726927

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…