The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2023

Filed:

Jan. 10, 2022
Applicant:

Medtronic, Inc., Minneapolis, MN (US);

Inventors:

Andreas Fenner, Chandler, AZ (US);

David A. Ruben, Mesa, AZ (US);

Andrew J. Ries, Lino Lakes, MN (US);

Chetan Patel, Phoenix, AZ (US);

Assignee:

Medtronic, Inc., Minneapolis, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01L 9/00 (2006.01); H01L 23/00 (2006.01); H05K 5/06 (2006.01); A61B 5/0215 (2006.01); B23K 26/20 (2014.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
G01L 9/0073 (2013.01); B23K 26/20 (2013.01); H01L 23/5226 (2013.01); H01L 24/48 (2013.01); H05K 5/06 (2013.01); A61B 5/0215 (2013.01); A61B 2562/0247 (2013.01);
Abstract

Various embodiments of a pressure sensor assembly and an implantable medical device that includes such assembly are disclosed. The assembly includes a substrate having a via that extends through the substrate along a via axis between a first major surface and a second major surface of the substrate, a membrane disposed on the first major surface of the substrate and over the via, and a patterned metal layer disposed on a first major surface of the membrane, a portion of such layer including a first capacitor plate. The assembly further includes an integrated circuit disposed adjacent to the first major surface of the membrane and electrically connected to the metal layer. The integrated circuit includes a second capacitor plate disposed on or within a substrate of the integrated circuit. The first capacitor plate and the second capacitor plate form a variable capacitor disposed along the via axis.


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