The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Oct. 29, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Kyung Hwan Lee, Suwon-si, KR;

Yong Seok Kim, Suwon-si, KR;

Tae Hun Kim, Suwon-si, KR;

Seok Han Park, Suwon-si, KR;

Satoru Yamada, Suwon-si, KR;

Jae Ho Hong, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10N 70/20 (2023.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10N 70/24 (2023.02); H10B 63/34 (2023.02); H10N 70/023 (2023.02); H10N 70/231 (2023.02); H10N 70/826 (2023.02); H10N 70/8833 (2023.02);
Abstract

A semiconductor device includes a stack structure on a substrate, the stack structure including alternating gate electrodes and insulating layers stacked along a first direction, a vertical opening through the stack structure along the first direction, the vertical opening including a channel structure having a semiconductor layer on an inner sidewall of the vertical opening, and a variable resistive material on the semiconductor layer, a vacancy concentration in the variable resistive material varies along its width to have a higher concentration closer to a center of the channel structure than to the semiconductor layer, and an impurity region on the substrate, the semiconductor layer contacting the impurity region at a bottom of the channel structure.


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