The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Oct. 20, 2020
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Yaojian Leng, Portland, OR (US);

Justin Sato, West Linn, OR (US);

Bomy Chen, Newark, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10K 19/00 (2023.01); H10K 19/10 (2023.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H10K 19/201 (2023.02); H10K 19/10 (2023.02); H01L 28/10 (2013.01);
Abstract

An integrated circuit (IC) package product, e.g., system-on-chip (SoC) or system-in-package (SiP) product, may include at least one integrated inductor having a core magnetic field (B field) that extends parallel to the substrate major plane of at least one die or chiplet included in or mounted to the product, which may reduce the eddy currents within each die/chiplet substrate, and thereby reduce energy loss of the indictor. The IC package product may include a horizontally-extending IC package substrate, a horizontally-extending die mount base arranged on the IC package substrate, at least one die mounted to the die mount base in a vertical orientation, and an integrated inductor having a B field extending in a vertical direction parallel to the silicon substrate of each vertically-mounted die, thereby providing a reduced substrate loss in the integrated inductor, which provides an increased quality factor (Q) of the inductor.


Find Patent Forward Citations

Loading…