The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Aug. 30, 2021
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventor:

Takuya Futase, Nagoya, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
G11C 13/0004 (2013.01); G11C 13/003 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); H10N 70/021 (2023.02); H10N 70/063 (2023.02); H10N 70/231 (2023.02);
Abstract

A method is provided that includes forming a cell film stack on a substrate of a wafer, the cell film stack comprising a top silicon layer, depositing a sacrificial layer onto the top silicon layer, etching the cell film stack and the sacrificial layer to form a plurality of pillars, depositing a dielectric to fill in gaps between the plurality of pillars, planarizing the wafer to a predefined thickness for the sacrificial layer, removing the sacrificial layer, depositing nickel onto the wafer to form a nickel layer, annealing the wafer to form a di-nickel silicide layer between the nickel layer and the top silicon layer, wet etching unreacted nickel of the nickel layer to expose the di-nickel silicide layer, and annealing the wafer to form a nickel monosilicide layer from the di-nickel silicide layer and the top silicon layer, the nickel monosilicide layer forming a monosilicide electrode.


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