The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Jul. 13, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Wei Lu Chu, Shanghai, CN;

Dong Pan, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/14 (2006.01); G11C 11/4074 (2006.01); G11C 11/4091 (2006.01); H03H 7/06 (2006.01); G11C 5/14 (2006.01); G05F 1/575 (2006.01); G11C 11/4063 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G05F 1/575 (2013.01); G11C 5/147 (2013.01); G11C 7/14 (2013.01); G11C 11/4063 (2013.01); G11C 11/4091 (2013.01); H03H 7/06 (2013.01);
Abstract

Methods, systems, and devices for compensating for kickback noise are described. A regulator may include an input circuit, a bias circuit, and an enable circuit. The regulator may be configured so that the enable circuit is positioned between the input circuit and the bias circuit. A balance resistor may be included in a path between an input of the regulator and a gate of a bias transistor included in the bias transistor. A size of the balance resistor may be based on an amount of charge drawn by the bias transistor during an activation event. Dimensions of the bias transistor may be modified based on an amount of charge drawn by the bias transistor during an activation event.


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