The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Feb. 17, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Hung-Li Chiang, Taipei, TW;

Chih-Sheng Chang, Hsinchu, TW;

Tzu-Chiang Chen, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78391 (2014.09); H01L 27/0886 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01);
Abstract

An MFMIS-FET includes a MOSFET having a three-dimensional structure that allows the MOSFET to have an effective area that is greater than the footprint of the MFM or the MOSFET. In some embodiment, the gate electrode of the MOSFET and the bottom electrode of the MFM are united. In some, they have equal areas. In some embodiments, the MFM and the MOSFET have nearly equal footprints. In some embodiments, the effective area of the MOSFET is much greater than the effective area of the MFM. These structures reduce the capacitance ratio between the MFM structure and the MOSFET without reducing the area of the MFM structure in a way that would decrease drain current.


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