The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Jan. 11, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Toby D. Robbs, Boise, ID (US);

Charles L. Ingalls, Meridian, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); G11C 11/4091 (2006.01); G11C 11/4097 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 11/4097 (2013.01); H10B 12/50 (2023.02);
Abstract

Apparatuses and methods for sense line architectures for semiconductor memories are disclosed. An example apparatus includes a first array region including first portions of a plurality of sense lines and memory cells coupled to the first portions of the plurality of sense lines and further includes a second array region including second portions of the plurality of sense lines and memory cells coupled to the second portions of the plurality of sense lines. An array gap is disposed between the first and second array regions and includes third portions of the plurality of sense lines and does not include any memory cells. Each third portion of the plurality of sense lines includes conductive structures having vertical components configured to couple the first portions and second portions of the plurality of sense lines to provide an electrically continuous sense lines through the first and second array regions and the array gap.


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