Power loss recovery for memory devices

Abstract

An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices. The processing device is configured to store, on a non-volatile memory device of the one or more memory devices, a snapshot of a logical-to-physical (L2P) table comprising a plurality of L2P table entries, each L2P table entry mapping a logical address defined in a logical address space to a physical address identifying a management unit on a memory device of the one or more memory devices; store, on the non-volatile memory device of the one or more memory devices, a physical-to-logical (P2L) table comprising a plurality of P2L table entries, each L2P table entry mapping a physical address identifying a management unit on a memory device of the one or more memory devices to metadata associated with the management unit; store, on the non-volatile memory device, a list of unallocated MUs; store, on the non-volatile memory device, an L2P update journal including one or more L2P journal entries, wherein each L2P journal entry reflects an update to an L2P table entry of the plurality of L2P table entries, wherein the update has been performed after storing the snapshot of the L2P table; and responsive to detecting a power up event following a power loss event, reconstruct the L2P table using the snapshot of the L2P table, the L2P update journal, the P2L table, and the list of unallocated management units.