The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2023

Filed:

Sep. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Michael David Hutton, Mountain View, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/20 (2006.01); H01L 21/48 (2006.01); H01L 23/367 (2006.01); B60H 1/00 (2006.01); G06F 1/324 (2019.01); G06F 1/3234 (2019.01); G06F 1/3287 (2019.01); B60H 1/22 (2006.01); H01L 23/373 (2006.01); H01L 23/34 (2006.01);
U.S. Cl.
CPC ...
G06F 1/206 (2013.01); B60H 1/00921 (2013.01); B60H 1/22 (2013.01); G06F 1/20 (2013.01); G06F 1/324 (2013.01); G06F 1/3243 (2013.01); G06F 1/3287 (2013.01); H01L 21/4882 (2013.01); H01L 23/3675 (2013.01); H01L 23/3677 (2013.01); H01L 23/373 (2013.01); H01L 23/34 (2013.01);
Abstract

A system includes a programmable logic device (PLD) and a processor. The processor determines sets of power values associated with respective portions of a plurality of portions of the PLD. The processor also determines a temperature value for each portion of the plurality of portions based on the sets of power values and platform data associated with the PLD. Additionally, the processor generates a power map indicative of an expected amount of power for each portion of the plurality of portions based on the sets of power values. Furthermore, the processor generates a heat map indicative of an expected temperature value for each portion of the plurality of portions.


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