The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2023

Filed:

May. 23, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yi-Hsuan Liu, Hsinchu, TW;

Hsieh-Hung Hsieh, Hsinchu, TW;

Chewn-Pu Jou, Hsinchu, TW;

Fu-Lung Hsueh, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/12 (2006.01); H03J 3/20 (2006.01); H03J 3/22 (2006.01); H01F 21/12 (2006.01);
U.S. Cl.
CPC ...
H03B 5/1256 (2013.01); H03B 5/1212 (2013.01); H03B 5/1228 (2013.01); H01F 2021/125 (2013.01); H03B 2201/0216 (2013.01); H03J 3/20 (2013.01); H03J 3/22 (2013.01);
Abstract

A method using a phase locked loop (PLL) includes receiving a reference frequency. The method further includes generating a control signal based on the reference frequency. The method further includes adjusting an output signal based on the control signal. Adjusting the output signal includes operating a plurality of switches in response to the control signal, wherein operating the plurality of switches comprises selectively electrically connecting a first ground plane to a first floating plane, wherein the first floating plane is between the first ground plane and the signal line, and the first floating plane is a same distance from a substrate as the first ground plane.


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