The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2023

Filed:

May. 12, 2020
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Yasutaka Nakashiba, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/522 (2006.01); H01L 23/64 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5227 (2013.01); H01L 21/56 (2013.01); H01L 23/291 (2013.01); H01L 23/3121 (2013.01); H01L 23/645 (2013.01); H01L 24/29 (2013.01);
Abstract

A semiconductor device has a substrate, a first circuit, a first inductor, a second circuit and a second inductor IND. The substrate includes a first region and a second region, which are regions different from each other. The first circuit is formed on the first region. The first inductor is electrically connected with the first circuit. The second circuit is formed on the second regions. The second inductor is electrically connected with the second circuit and formed to face the first inductor. A penetrating portion is formed in the substrate. The penetrating portion is formed such that the penetrating portion surrounds one or both of the first circuit and the second circuit in plan view.


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