The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 18, 2023
Filed:
Dec. 29, 2020
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Xin Miao, Slingerlands, NY (US);
Kangguo Cheng, Schenectady, NY (US);
Wenyu Xu, Albany, NY (US);
Chen Zhang, Albany, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/8234 (2006.01); H01L 29/10 (2006.01); H01L 21/762 (2006.01); H01L 29/08 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 21/265 (2006.01); H01L 21/311 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7843 (2013.01); H01L 21/0217 (2013.01); H01L 21/76224 (2013.01); H01L 21/823412 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823481 (2013.01); H01L 27/0924 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/1033 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/26513 (2013.01); H01L 21/3065 (2013.01); H01L 21/3081 (2013.01); H01L 21/31116 (2013.01);
Abstract
A method of fabricating a semiconductor device is described. The method includes forming a nanosheet stack on a substrate, the nanosheet stack includes nanosheet channel layers. A gate is formed around the nanosheet channel layers of the nanosheet stack. A strained material is formed along a sidewall surface of the gate. The strained material is configured to create strain in the nanosheet channel layers of the nanosheet stack.