The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Dec. 21, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Sanh D. Tang, Boise, ID (US);

John K. Zahurak, Eagle, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/11551 (2017.01); H10B 43/27 (2023.01); H01L 21/28 (2006.01); H01L 27/06 (2006.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01); H01L 29/792 (2006.01); H10B 41/10 (2023.01); H10B 41/20 (2023.01); H10B 41/27 (2023.01); H10B 41/50 (2023.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01); H10B 43/50 (2023.01); H10B 63/00 (2023.01); H01L 21/768 (2006.01); G11C 13/00 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/26 (2006.01); H01L 23/528 (2006.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); G11C 13/004 (2013.01); G11C 13/0069 (2013.01); G11C 13/0097 (2013.01); G11C 16/10 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); H01L 21/76838 (2013.01); H01L 23/528 (2013.01); H01L 27/0688 (2013.01); H01L 29/40114 (2019.08); H01L 29/66825 (2013.01); H01L 29/66833 (2013.01); H01L 29/7889 (2013.01); H01L 29/7926 (2013.01); H10B 41/10 (2023.02); H10B 41/20 (2023.02); H10B 41/27 (2023.02); H10B 41/50 (2023.02); H10B 43/10 (2023.02); H10B 43/20 (2023.02); H10B 43/50 (2023.02); H10B 63/34 (2023.02); H10B 63/845 (2023.02); G11C 2213/71 (2013.01); H10N 70/231 (2023.02);
Abstract

Some embodiments include a memory device and methods of forming the memory device. One such memory device includes a first group of memory cells, each of the memory cells of the first group being formed in a cavity of a first control gate located in one device level of the memory device. The memory device also includes a second group of memory cells, each of the memory cells of the second group being formed in a cavity of a second control gate located in another device level of the memory device. Additional apparatus and methods are described.


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