The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Jul. 01, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hsiao-Tsung Yen, Hsinchu, TW;

Cheng-Wei Luo, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/822 (2006.01); H01L 23/66 (2006.01); H01L 25/065 (2023.01); H01L 27/06 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5227 (2013.01); H01L 21/8221 (2013.01); H01L 23/5223 (2013.01); H01L 23/5225 (2013.01); H01L 23/5226 (2013.01); H01L 23/66 (2013.01); H01L 25/065 (2013.01); H01L 25/0657 (2013.01); H01L 27/0694 (2013.01); H01L 23/481 (2013.01); H01L 2223/6622 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06537 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A tank circuit structure includes a first gate layer, a first substrate, a first shielding layer, a first inductor, a second inductor and a first inter metal dielectric (IMD) layer. The first substrate is over the first gate layer. The first shielding layer is over the first gate layer. The first inductor is over the first shielding layer. The second inductor is below the first substrate. The first IMD layer is between the first substrate and the first shielding layer.


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