The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Aug. 29, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Praveen Kumar Gupta, Hillsboro, OR (US);

Avinash N. Ananthakrishnan, Portland, OR (US);

Eugene Gorbatov, Hillsboro, OR (US);

Stephen H. Gunther, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/32 (2018.01); G06F 1/10 (2006.01); G06F 1/08 (2006.01); G06F 1/3296 (2019.01); G06F 1/324 (2019.01);
U.S. Cl.
CPC ...
G06F 9/4893 (2013.01); G06F 1/08 (2013.01); G06F 1/10 (2013.01); G06F 1/3296 (2013.01); G06F 1/324 (2013.01);
Abstract

In one embodiment, a processor includes a power controller having a resource allocation circuit. The resource allocation circuit may: receive a power budget for a first core and at least one second core and scale the power budget based at least in part on at least one energy performance preference value to determine a scaled power budget; determine a first maximum operating point for the first core and a second maximum operating point for the at least one second core based at least in part on the scaled power budget; determine a first efficiency value for the first core based at least in part on the first maximum operating point for the first core and a second efficiency value for the at least one second core based at least in part on the second maximum operating point for the at least one second core; and report a hardware state change to an operating system scheduler based on the first efficiency value and the second efficiency value. Other embodiments are described and claimed.


Find Patent Forward Citations

Gupta, Praveen. (2023). System, apparatus and method for providing hardware state feedback to an operating system in a heterogeneous processor (U.S. Patent No. 11698812). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11698812

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…