The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2023
Filed:
Feb. 28, 2019
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Sudhir Satpathy, Redmond, WA (US);
Vikram Suresh, Portland, OR (US);
Sanu Mathew, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/06 (2006.01); H04L 9/00 (2022.01);
U.S. Cl.
CPC ...
H04L 9/0637 (2013.01); H04L 9/003 (2013.01); H04L 9/065 (2013.01); H04L 9/0631 (2013.01); H04L 9/0662 (2013.01); H04L 2209/043 (2013.01);
Abstract
An integrated circuit features technology for generating a keystream. The integrated circuit comprises a cipher block with a linear feedback shift register (LFSR) and a finite state machine (FSM). The LFSR and the FSM are configured to generate a stream of keys, based on an initialization value and an initialization key. The FSM comprises an Sbox that is configured to use a multiplicative mask to mask data that is processed by the Sbox when the LFSR and the FSM are generating the stream of keys. Other embodiments are described and claimed.